FRAM DELIVERS UNIFIED MEMORY FOR 16-BIT MICROCONTROLLER

FRAM Delivers Unified Memory for 16-bit Microcontroller                  

Electronic Design                                     

Texas Instruments’ (TI) latest MSP430 microcontrollers utilize FRAM for code and data. The

 unified memory approach simplifies development since code space can be traded off for more data RAM. FRAM does not suffer the limitations of flash memory like write speed and limited write lifetimes. FRAM supports 1015 write cycles and is 100× faster with writes at 2 Mbytes/s.   

      

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FRAM is a non-volatile memory so data does not need to be saved in flash memory when the system powers down. TI’s FRAM microcontrollers do not need a low power mode that maintains RAM because data is store in non-volatile FRAM. This feature can significantly enhance power utilization especially in very-low-power Internet of Things (IoT) applications.

The two new chips are the MSP430FR2111 and MSP430FR5994. The MSP430FR2111 (Fig. 1) is designed for compact applications. It is available in a 3-mm by 3-mm, 24-pin QFN package and comes with 2 Kbytes of FRAM.

1. The TI MSP430FR2111 comes in a 3-mm by 3-mm package. It includes 2 Kbytes of FRAM.

There is also a 16-pin TSSOP package still allows 12 IO pins. Both include capacitive touch support. The analog subsystem includes an 8-channel 10-bit ADC. The enhance comparator includes a 6-bit programmable threshold. The chip also has an eUSCIA serial port that supports UART and SPI protocols. There are two 16-bit timers and a watchdog timer.

The MSP430FR5994 (Fig. 2) has 256 Kbytes FRAM and 8K SRAM. The reason for including SRAM is that SRAM is faster than FRAM, but SRAM is volatile. This allows developers to adjust the data distribution to take best advantage of speed versus non-volatility. The ultra-low power standby current is 450 nA with only the real-time clock (RTC) running.

2. The MSP430FR5994 includes 256 Kbytes FRAM and 8K SRAM.

The other new feature in the MSP430FR5994 is the integrated low-energy accelerator (LEA). This is a hardware accelerator that requires no CPU intervention. It provides a set of fixed computational functions including a 256-point FFT plus FIR and IF. It can handle 16- and 32-bit data providing computational power that is 14× that of the host processor at lower power. The chip also has a 32- by 32-bit multiplier.

The MSP430FR5994 also has 128- and 256-bit AES hardware support plus a hardware random number generator (RNG). The chip has eight serial ports and a 16-channel, 12-bit differential ADC with integrated window comparator. There is also a 16-channel comparator. The RTC includes calendar and alarm support.

The MSP430FR5994 has more advanced debug support including EnergyTrace++ technology. There is real-time JTAG support and embedded emulation support. A bootstrap loader provides flexible boot support.

LaunchPad kits for both chips start at $15.99. The MSP430FR5994 LaunchPad (Fig. 3) includes a MicroSD socket and a supercap. The on-board debug support includes power trace capability.

3. The MSP430FR5994 LaunchPad includes a MicroSD socket and a supercap.